Ibex Regression Results
Date/Time run: Thursday 31 August 2023 04:09 UTC
| Test Name | Passing | Total | Pass Rate |
|---|
| riscv_arithmetic_basic_test |
10 |
10 |
100.0% |
| riscv_machine_mode_rand_test |
10 |
10 |
100.0% |
| riscv_rand_instr_test |
9 |
10 |
90.0% |
| riscv_rand_jump_test |
8 |
10 |
80.0% |
| riscv_jump_stress_test |
10 |
10 |
100.0% |
| riscv_loop_test |
10 |
10 |
100.0% |
| riscv_mmu_stress_test |
10 |
10 |
100.0% |
| riscv_illegal_instr_test |
15 |
15 |
100.0% |
| riscv_hint_instr_test |
10 |
10 |
100.0% |
| riscv_ebreak_test |
10 |
10 |
100.0% |
| riscv_debug_basic_test |
10 |
10 |
100.0% |
| riscv_debug_triggers_test |
5 |
5 |
100.0% |
| riscv_debug_stress_test |
15 |
15 |
100.0% |
| riscv_debug_branch_jump_test |
9 |
10 |
90.0% |
| riscv_debug_instr_test |
24 |
25 |
96.0% |
| riscv_debug_wfi_test |
9 |
10 |
90.0% |
| riscv_dret_test |
3 |
5 |
60.0% |
| riscv_debug_ebreak_test |
15 |
15 |
100.0% |
| riscv_debug_ebreakmu_test |
12 |
15 |
80.0% |
| riscv_debug_csr_entry_test |
10 |
10 |
100.0% |
| riscv_irq_in_debug_mode_test |
9 |
10 |
90.0% |
| riscv_debug_in_irq_test |
9 |
10 |
90.0% |
| riscv_assorted_traps_interrupts_debug_test |
3 |
10 |
30.0% |
| riscv_single_interrupt_test |
11 |
15 |
73.3% |
| riscv_multiple_interrupt_test |
10 |
10 |
100.0% |
| riscv_nested_interrupt_test |
10 |
10 |
100.0% |
| riscv_interrupt_instr_test |
25 |
25 |
100.0% |
| riscv_interrupt_wfi_test |
14 |
15 |
93.3% |
| riscv_interrupt_csr_test |
10 |
10 |
100.0% |
| riscv_csr_test |
5 |
5 |
100.0% |
| riscv_unaligned_load_store_test |
5 |
5 |
100.0% |
| riscv_mem_error_test |
15 |
15 |
100.0% |
| riscv_mem_intg_error_test |
45 |
50 |
90.0% |
| riscv_debug_single_step_test |
12 |
15 |
80.0% |
| riscv_reset_test |
10 |
15 |
66.7% |
| riscv_pc_intg_test |
14 |
15 |
93.3% |
| riscv_rf_intg_test |
15 |
15 |
100.0% |
| riscv_icache_intg_test |
15 |
15 |
100.0% |
| riscv_rv32im_instr_test |
5 |
5 |
100.0% |
| riscv_user_mode_rand_test |
10 |
10 |
100.0% |
| riscv_umode_tw_test |
10 |
10 |
100.0% |
| riscv_invalid_csr_test |
10 |
10 |
100.0% |
| riscv_pmp_basic_test |
47 |
50 |
94.0% |
| riscv_pmp_disable_all_regions_test |
50 |
50 |
100.0% |
| riscv_pmp_out_of_bounds_test |
44 |
50 |
88.0% |
| riscv_pmp_full_random_test |
561 |
600 |
93.5% |
| riscv_pmp_region_exec_test |
20 |
20 |
100.0% |
| riscv_epmp_mml_test |
19 |
20 |
95.0% |
| riscv_epmp_mml_execute_only_test |
20 |
20 |
100.0% |
| riscv_epmp_mml_read_only_test |
20 |
20 |
100.0% |
| riscv_epmp_mmwp_test |
17 |
20 |
85.0% |
| riscv_epmp_rlb_test |
19 |
20 |
95.0% |
| riscv_bitmanip_otearlgrey_test |
10 |
10 |
100.0% |
| riscv_bitmanip_balanced_test |
10 |
10 |
100.0% |
| Total |
1323 |
1415 |
93.5% |
Coverage
| Functional | Block | Branch | Statement | Expression | Toggle | FSM | Assertion |
|---|
| 93.7% |
94.9% |
90.5% |
95.1% |
89.8% |
98.6% |
100.0% |
98.1% |
Test Failure Details
riscv_rand_instr_test.19758
---------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
967: 28864677: Illegal instruction (hart 0) at PC 0x8000a6c4: 0x7b2073f3
968: 28920057: Illegal instruction (hart 0) at PC 0x8000a7f6: 0xf14c5073
969: 28920097: Illegal instruction (hart 0) at PC 0x8000a7f6: 0xf14c5073
970: 28971257: Illegal instruction (hart 0) at PC 0x8000a948: 0xf113d473
971: 28971297: Illegal instruction (hart 0) at PC 0x8000a948: 0xf113d473
[E] 972: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002027: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
973:
974: --- RISC-V UVM TEST FAILED ---
975:
976: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002027: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_rand_jump_test.19756
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_rand_jump_test.19756/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 28002021: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 28002021: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_rand_jump_test.19758
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2027: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2027: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_rand_jump_test.19758/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 26002027: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 26002027: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_branch_jump_test.19756
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_branch_jump_test.19756/trace_core_00000000.log
112: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 30801: reporter@@debug_seq_stress_h [debug_seq_stress_h] Starting sequence...
[E] 113: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 32002021: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
114:
115: --- RISC-V UVM TEST FAILED ---
116:
117: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 32002021: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_instr_test.19770
----------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
1055: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 29823297: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
1056: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 29910437: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
1057: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 29911937: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
1058: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 29980057: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
1059: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 29981537: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 1060: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 30002017: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
1061:
1062: --- RISC-V UVM TEST FAILED ---
1063:
1064: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 30002017: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_wfi_test.19756
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_wfi_test.19756/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(307) @ 2000002021: uvm_test_top [uvm_test_top] TEST TIMEOUT!!
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 2000002021: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_dret_test.19757
---------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
108: 122667: Illegal instruction (hart 0) at PC 0x800035d2: 0x7b200073
109: 122687: Illegal instruction (hart 0) at PC 0x800035d2: 0x7b200073
110: 122707: Illegal instruction (hart 0) at PC 0x800035d2: 0x7b200073
111: 122727: Illegal instruction (hart 0) at PC 0x800035d2: 0x7b200073
112: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(778) @ 137037: uvm_test_top [uvm_test_top] mcause: 0x2
[E] 113: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(843) @ 143397: reporter [uvm_test_top] Check failed dut_vif.dut_cb.priv_mode == mode (0 [0x0] vs 3 [0x3]) Incorrect privilege mode
114:
115: --- RISC-V UVM TEST FAILED ---
116:
117: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 143397: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_dret_test.19760
---------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_dret_test.19760/trace_core_00000000.log
108: 53191: Illegal instruction (hart 0) at PC 0x80003346: 0x7b200073
109: 53231: Illegal instruction (hart 0) at PC 0x80003346: 0x7b200073
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(778) @ 68701: uvm_test_top [uvm_test_top] mcause: 0x2
[E] 111: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(843) @ 83001: reporter [uvm_test_top] Check failed dut_vif.dut_cb.priv_mode == mode (0 [0x0] vs 3 [0x3]) Incorrect privilege mode
112:
113: --- RISC-V UVM TEST FAILED ---
114:
115: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 83001: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_ebreakmu_test.19766
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2016: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2016: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_ebreakmu_test.19766/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1551) @ 23676: uvm_test_top [uvm_test_top] EBreak seen whilst doing initial debug initialization, KNOWN FAILURE SEE https://github.com/lowRISC/ibex/issues/1313
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 23676: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_ebreakmu_test.19769
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2020: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2020: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_ebreakmu_test.19769/trace_core_00000000.log
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26400: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
111: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 27920: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 28002020: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
113:
114: --- RISC-V UVM TEST FAILED ---
115:
116: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 28002020: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_ebreakmu_test.19770
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2017: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2017: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_ebreakmu_test.19770/trace_core_00000000.log
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 33117: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
111: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 34637: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002017: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
113:
114: --- RISC-V UVM TEST FAILED ---
115:
116: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002017: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_irq_in_debug_mode_test.19764
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
3241: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 28985842: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
3242: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 29001342: uvm_test_top.env.irq_agent.sequencer@@irq_raise_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_raise_seq_h] Starting sequence...
3243: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 29001352: uvm_test_top.env.irq_agent.sequencer@@irq_raise_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_raise_seq_h] Exiting sequence
3244: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 29001382: uvm_test_top [uvm_test_top] irq: 0xa3850888
3245: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 29001382: uvm_test_top [uvm_test_top] irq_id: 0x1f
[E] 3246: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002022: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
3247:
3248: --- RISC-V UVM TEST FAILED ---
3249:
3250: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002022: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_in_irq_test.19764
-----------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
2510: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(778) @ 26929702: uvm_test_top [uvm_test_top] mcause: 0x8000001f
2511: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26930862: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
2512: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26932382: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
2513: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26997842: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Starting sequence...
2514: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26997852: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
[E] 2515: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 27002022: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
2516:
2517: --- RISC-V UVM TEST FAILED ---
2518:
2519: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 27002022: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.19757
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
162: 1626947: Illegal instruction (hart 0) at PC 0x0000558c: 0x00010413
163: 1659467: Illegal instruction (hart 0) at PC 0x00005590: 0x00010413
164: 1659507: Illegal instruction (hart 0) at PC 0x00005590: 0x00010413
165: 1682707: Illegal instruction (hart 0) at PC 0x00005594: 0x00010413
166: 1682747: Illegal instruction (hart 0) at PC 0x00005594: 0x00010413
[E] 167: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 1707497: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x22 DUT: 0 expected: 40000000
168:
169:
170: --- RISC-V UVM TEST FAILED ---
171:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.19758
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
605: 10921777: Illegal instruction (hart 0) at PC 0xda1fa730: 0x00010413
606: 10972297: Illegal instruction (hart 0) at PC 0xda1fa734: 0x00010413
607: 10972337: Illegal instruction (hart 0) at PC 0xda1fa734: 0x00010413
608: 10990157: Illegal instruction (hart 0) at PC 0xda1fa738: 0x00010413
609: 10990197: Illegal instruction (hart 0) at PC 0xda1fa738: 0x00010413
[E] 610: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 11019127: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x22 DUT: 0 expected: 1000000
611:
612:
613: --- RISC-V UVM TEST FAILED ---
614:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.19759
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
144: 454074: Illegal instruction (hart 0) at PC 0x8000c1e2: 0x0613fc06
145: 454114: Illegal instruction (hart 0) at PC 0x8000c1e2: 0x0613fc06
146: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(77) @ 465584: uvm_test_top.env.irq_agent.sequencer@@debug_new_seq_h [uvm_test_top.env.irq_agent.sequencer.debug_new_seq_h] Running 2/9
147: 474934: Illegal instruction (hart 0) at PC 0x8000c1e2: 0x0613fc06
148: 474974: Illegal instruction (hart 0) at PC 0x8000c1e2: 0x0613fc06
[E] 149: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 481044: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x15 DUT: 0 expected: 800000
150:
151:
152: --- RISC-V UVM TEST FAILED ---
153:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.19760
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
110: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_assorted_traps_interrupts_debug_test.19760/trace_core_00000000.log
111: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 37261: uvm_test_top.env.irq_agent.sequencer@@debug_new_seq_h [uvm_test_top.env.irq_agent.sequencer.debug_new_seq_h] Running the "MultipleRuns" schedule for stimulus generation
112: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(75) @ 37261: uvm_test_top.env.irq_agent.sequencer@@debug_new_seq_h [uvm_test_top.env.irq_agent.sequencer.debug_new_seq_h] Number of stimulus iterations = 1
113: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(77) @ 37261: uvm_test_top.env.irq_agent.sequencer@@debug_new_seq_h [uvm_test_top.env.irq_agent.sequencer.debug_new_seq_h] Running 0/1
114: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 37261: uvm_test_top.env.irq_agent.sequencer@@irq_new_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_new_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
[E] 115: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 106681: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x2 DUT: 0 expected: 800000
116:
117:
118: --- RISC-V UVM TEST FAILED ---
119:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.19761
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
217: 2300368: Illegal instruction (hart 0) at PC 0x000000fe: 0x00010413
218: 2339168: Illegal instruction (hart 0) at PC 0x00000102: 0x00010413
219: 2339208: Illegal instruction (hart 0) at PC 0x00000102: 0x00010413
220: 2390268: Illegal instruction (hart 0) at PC 0x00000106: 0x00010413
221: 2390308: Illegal instruction (hart 0) at PC 0x00000106: 0x00010413
[E] 222: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 2426218: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x13 DUT: 0 expected: 80000
223:
224:
225: --- RISC-V UVM TEST FAILED ---
226:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.19762
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
921: 15326665: Illegal instruction (hart 0) at PC 0x0feee094: 0x00010413
922: 15361945: Illegal instruction (hart 0) at PC 0x0feee098: 0x00010413
923: 15361985: Illegal instruction (hart 0) at PC 0x0feee098: 0x00010413
924: 15385625: Illegal instruction (hart 0) at PC 0x0feee09c: 0x00010413
925: 15385665: Illegal instruction (hart 0) at PC 0x0feee09c: 0x00010413
[E] 926: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 15428195: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x22 DUT: 0 expected: 80000
927:
928:
929: --- RISC-V UVM TEST FAILED ---
930:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.19765
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
124: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(77) @ 457179: uvm_test_top.env.irq_agent.sequencer@@debug_new_seq_h [uvm_test_top.env.irq_agent.sequencer.debug_new_seq_h] Running 2/4
125: 478209: Illegal instruction (hart 0) at PC 0x8000b59a: 0xe25a721f
126: 478249: Illegal instruction (hart 0) at PC 0x8000b59a: 0xe25a721f
127: 518049: Illegal instruction (hart 0) at PC 0xfffffffe: 0x00010413
128: 518089: Illegal instruction (hart 0) at PC 0xfffffffe: 0x00010413
[E] 129: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 518119: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch A load at address fffffffe was expected but there are no pending accesses
130:
131:
132: --- RISC-V UVM TEST FAILED ---
133:
--------------------------------------------
riscv_single_interrupt_test.19756
---------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
170: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 238841: uvm_test_top [uvm_test_top] irq: 0x200000
171: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 238841: uvm_test_top [uvm_test_top] irq_id: 0x15
172: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(283) @ 238961: uvm_test_top [uvm_test_top] Test done due to RISCV-DV handshake (payload=TEST_PASS)
173: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(64) @ 238961: uvm_test_top.env.irq_agent.sequencer@@irq_single_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_single_seq_h] Stopping sequence
174: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(64) @ 238961: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Stopping sequence
[E] 175: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(418) @ 289541: reporter [uvm_test_top] Check failed signature_data == core_status (8 [0x8] vs 6 [0x6]) Core did not jump to vectored interrupt handler
176:
177: --- RISC-V UVM TEST FAILED ---
178:
179: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 289541: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_single_interrupt_test.19758
---------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_single_interrupt_test.19767
---------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
6627: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26970343: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
6628: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26988253: uvm_test_top.env.irq_agent.sequencer@@irq_single_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_single_seq_h] Starting sequence...
6629: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26988263: uvm_test_top.env.irq_agent.sequencer@@irq_single_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_single_seq_h] Exiting sequence
6630: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 26988293: uvm_test_top [uvm_test_top] irq: 0x40000
6631: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 26988293: uvm_test_top [uvm_test_top] irq_id: 0x12
[E] 6632: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 27002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
6633:
6634: --- RISC-V UVM TEST FAILED ---
6635:
6636: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 27002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_single_interrupt_test.19768
---------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
8756: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 28991933: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
8757: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 29000063: uvm_test_top.env.irq_agent.sequencer@@irq_single_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_single_seq_h] Starting sequence...
8758: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 29000073: uvm_test_top.env.irq_agent.sequencer@@irq_single_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_single_seq_h] Exiting sequence
8759: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 29000103: uvm_test_top [uvm_test_top] irq: 0x800000
8760: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 29000103: uvm_test_top [uvm_test_top] irq_id: 0x17
[E] 8761: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002023: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
8762:
8763: --- RISC-V UVM TEST FAILED ---
8764:
8765: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002023: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_interrupt_wfi_test.19770
------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
7841: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 30964977: uvm_test_top [uvm_test_top] irq: 0x80
7842: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 30964977: uvm_test_top [uvm_test_top] irq_id: 0x7
7843: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(778) @ 30972737: uvm_test_top [uvm_test_top] mcause: 0x80000007
7844: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 30974377: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Starting sequence...
7845: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 30974387: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
[E] 7846: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 31002017: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
7847:
7848: --- RISC-V UVM TEST FAILED ---
7849:
7850: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 31002017: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_mem_intg_error_test.19759
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
114: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1643) @ 25244: uvm_test_top [uvm_test_top] Running core_ibex_mem_error_test
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 25244: uvm_test_top.env.vseqr@@memory_error_seq_h [uvm_test_top.env.vseqr.memory_error_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 25244: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
117: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 65584: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 121184: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 119: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 129104: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x19 DUT: 8001f337 expected: 0
120:
121:
122: --- RISC-V UVM TEST FAILED ---
123:
--------------------------------------------
riscv_mem_intg_error_test.19762
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
114: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1643) @ 38855: uvm_test_top [uvm_test_top] Running core_ibex_mem_error_test
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 38855: uvm_test_top.env.vseqr@@memory_error_seq_h [uvm_test_top.env.vseqr.memory_error_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 116115: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
117: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 154355: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 188015: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 119: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 231635: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x13 DUT: 80028e50 expected: 0
120:
121:
122: --- RISC-V UVM TEST FAILED ---
123:
--------------------------------------------
riscv_mem_intg_error_test.19767
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 16753: uvm_test_top.env.vseqr@@memory_error_seq_h [uvm_test_top.env.vseqr.memory_error_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 16753: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
117: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 34593: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 70613: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
119: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 114813: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 120: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 155733: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x12 DUT: 800168e3 expected: 0
121:
122:
123: --- RISC-V UVM TEST FAILED ---
124:
--------------------------------------------
riscv_mem_intg_error_test.19774
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 106497: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
117: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 122637: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 171737: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
119: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 251577: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
120: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 281357: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 121: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 288157: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x17 DUT: 80013e64 expected: 0
122:
123:
124: --- RISC-V UVM TEST FAILED ---
125:
--------------------------------------------
riscv_mem_intg_error_test.19786
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 102187: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
117: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 185487: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 264167: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
119: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 286867: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
120: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 328147: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 121: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 370867: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x16 DUT: 80020dd8 expected: 0
122:
123:
124: --- RISC-V UVM TEST FAILED ---
125:
--------------------------------------------
riscv_debug_single_step_test.19756
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
145: 1723651: Illegal instruction (hart 0) at PC 0x8000be02: 0xf1415c73
146: 1758311: Illegal instruction (hart 0) at PC 0x8000be02: 0xf1415c73
147: 1758351: Illegal instruction (hart 0) at PC 0x8000be02: 0xf1415c73
148: 1780071: Illegal instruction (hart 0) at PC 0x8000be02: 0xf1415c73
149: 1780111: Illegal instruction (hart 0) at PC 0x8000be02: 0xf1415c73
[E] 150: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 1799021: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x24 DUT: 140 expected: 100
151:
152:
153: --- RISC-V UVM TEST FAILED ---
154:
--------------------------------------------
riscv_debug_single_step_test.19759
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 81404: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
116: 528334: Illegal instruction (hart 0) at PC 0x40000106: 0x00010413
117: 528374: Illegal instruction (hart 0) at PC 0x40000106: 0x00010413
118: 892014: Illegal instruction (hart 0) at PC 0x4000010a: 0x00010413
119: 892054: Illegal instruction (hart 0) at PC 0x4000010a: 0x00010413
[E] 120: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 892084: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT didn't write to register x15, but a write was expected
121:
122:
123: --- RISC-V UVM TEST FAILED ---
124:
--------------------------------------------
riscv_debug_single_step_test.19761
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
113: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_single_step_test.19761/trace_core_00000000.log
114: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 67198: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 68698: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
116: 461648: Illegal instruction (hart 0) at PC 0x40000106: 0x00010413
117: 461688: Illegal instruction (hart 0) at PC 0x40000106: 0x00010413
[E] 118: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 461718: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT didn't write to register x8, but a write was expected
119:
120:
121: --- RISC-V UVM TEST FAILED ---
122:
--------------------------------------------
riscv_reset_test.19759
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
215: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 24948524: uvm_test_top [uvm_test_top] Reset now inactive
216: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 25267506: uvm_test_top [uvm_test_top] Reset now active
217: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 25269504: uvm_test_top [uvm_test_top] Reset now inactive
218: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 25756728: uvm_test_top [uvm_test_top] Reset now active
219: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 25758724: uvm_test_top [uvm_test_top] Reset now inactive
[E] 220: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 26002024: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
221:
222: --- RISC-V UVM TEST FAILED ---
223:
224: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 26002024: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_reset_test.19764
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_reset_test.19766
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
213: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 26655636: uvm_test_top [uvm_test_top] Reset now inactive
214: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 27131295: uvm_test_top [uvm_test_top] Reset now active
215: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 27133276: uvm_test_top [uvm_test_top] Reset now inactive
216: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 27729607: uvm_test_top [uvm_test_top] Reset now active
217: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 27731596: uvm_test_top [uvm_test_top] Reset now inactive
[E] 218: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 28002016: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
219:
220: --- RISC-V UVM TEST FAILED ---
221:
222: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 28002016: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_reset_test.19767
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_reset_test.19768
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_pc_intg_test.19762
------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: Processing the ibex trace failed: Logfile /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pc_intg_test.19762/trace_core_00000000.log not found
riscv_pmp_basic_test.19762
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2015: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2015: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_basic_test.19762/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002015: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002015: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_basic_test.19778
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2018: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2018: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2018: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2018: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_basic_test.19778/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002018: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002018: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_basic_test.19797
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2019: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2019: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_basic_test.19797/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002019: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002019: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.19767
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.19767/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.19768
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2023: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.19768/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002023: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002023: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.19773
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2020: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2020: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2020: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2020: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.19773/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002020: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002020: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.19783
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2016: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2016: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.19783/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002016: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002016: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.19791
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2024: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2024: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.19791/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002024: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002024: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.19792
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.19792/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002021: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002021: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_full_random_test.19772
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2011: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2011: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19772/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 55171: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 31000000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19776
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2011: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2011: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19776/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 24151: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 66400000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19780
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
131: 786002: Illegal instruction (hart 0) at PC 0x8000363c: 0x3b059073
132: 810102: Illegal instruction (hart 0) at PC 0x80003640: 0x3a0a6073
133: 810142: Illegal instruction (hart 0) at PC 0x80003640: 0x3a0a6073
134: 826342: Illegal instruction (hart 0) at PC 0x80003650: 0x3b059073
135: 826382: Illegal instruction (hart 0) at PC 0x80003650: 0x3b059073
[E] 136: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 853092: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 0 but store at address 80035ce0 was expected
137: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
138:
139:
140: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19791
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2024: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2024: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19791/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 159424: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80003eb8
113:
114:
115: --- RISC-V UVM TEST FAILED ---
116:
--------------------------------------------
riscv_pmp_full_random_test.19812
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2012: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2012: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19812/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 30152: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address d812e8 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19837
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19837/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 41841: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 14f55160 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19848
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2026: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19848/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 44426: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 2a738000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19858
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
119: 531231: Illegal instruction (hart 0) at PC 0x800035da: 0x3a096073
120: 531251: Illegal instruction (hart 0) at PC 0x800035da: 0x3a096073
121: 531271: Illegal instruction (hart 0) at PC 0x800035da: 0x3a096073
122: 562251: Illegal instruction (hart 0) at PC 0x800035ea: 0x3b059073
123: 562291: Illegal instruction (hart 0) at PC 0x800035ea: 0x3b059073
[E] 124: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 578041: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 6c000000 but store at address 80035ce0 was expected
125: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
126:
127:
128: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19883
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2010: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2010: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19883/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 31370: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 427f8000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19894
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2022: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2022: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19894/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 672222: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 0 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19903
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19903/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 719761: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 4d9aeac0 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19908
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2019: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2019: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19908/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 210059: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 8400000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19914
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19914/trace_core_00000000.log
112: 21403: Illegal instruction (hart 0) at PC 0x800033a0: 0x3a086073
113: 21443: Illegal instruction (hart 0) at PC 0x800033a0: 0x3a086073
114: 47303: Illegal instruction (hart 0) at PC 0x800033b2: 0x3b0a1073
115: 47343: Illegal instruction (hart 0) at PC 0x800033b2: 0x3b0a1073
[E] 116: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 116313: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 663e9bc0 but store at address 80036ce0 was expected
117: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
118:
119:
120: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19949
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2017: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2017: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2017: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2017: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19949/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 27217: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address b5e54a0 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19972
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2019: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2019: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19972/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 122599: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 8940000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19973
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2029: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2029: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2029: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2029: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19973/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 100949: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 4df2f400 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19978
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2026: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19978/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 162906: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 80000000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19985
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2018: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2018: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2018: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2018: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19985/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 545278: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 353fa800 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.19992
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2030: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2030: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2030: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2030: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.19992/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 87790: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 12568000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20001
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2028: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2028: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20001/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 68048: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 0 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20028
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2023: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20028/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 1590523: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 800088e4
113:
114:
115: --- RISC-V UVM TEST FAILED ---
116:
--------------------------------------------
riscv_pmp_full_random_test.20037
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
317: 591059: Illegal instruction (hart 0) at PC 0x80003d4a: 0x3b069073
318: 651299: Illegal instruction (hart 0) at PC 0x80003d4e: 0x3a0ae073
319: 651339: Illegal instruction (hart 0) at PC 0x80003d4e: 0x3a0ae073
320: 667159: Illegal instruction (hart 0) at PC 0x80003d5e: 0x3b069073
321: 667199: Illegal instruction (hart 0) at PC 0x80003d5e: 0x3b069073
[E] 322: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 722469: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address ee130000 but store at address 80035ce0 was expected
323: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
324:
325:
326: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20090
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2030: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2030: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2030: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2030: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20090/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 541870: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 0 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20100
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2025: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2025: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2025: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2025: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20100/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 465445: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 30980000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20148
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2028: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2028: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20148/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 1254348: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 66373000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20150
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2022: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2022: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20150/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 247122: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 80000000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20163
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20163/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 56841: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address ad95000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20196
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2019: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2019: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20196/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 50779: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 0 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20206
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2014: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2014: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20206/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 1791734: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 0 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20207
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2024: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2024: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20207/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 27024: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 800034ec
113:
114:
115: --- RISC-V UVM TEST FAILED ---
116:
--------------------------------------------
riscv_pmp_full_random_test.20217
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2019: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2019: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20217/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 507359: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 0 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20237
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2010: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2010: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20237/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 110150: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 6b240000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20239
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2024: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2024: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20239/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 24944: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 28000000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20245
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2019: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2019: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20245/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 59099: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 45d64800 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20286
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20286/trace_core_00000000.log
112: 22447: Illegal instruction (hart 0) at PC 0x800034ec: 0x3a086073
113: 22487: Illegal instruction (hart 0) at PC 0x800034ec: 0x3a086073
114: 47867: Illegal instruction (hart 0) at PC 0x800034fe: 0x3b0b1073
115: 47907: Illegal instruction (hart 0) at PC 0x800034fe: 0x3b0b1073
[E] 116: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 78897: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 405e7600 but store at address 80035ce0 was expected
117: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
118:
119:
120: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20293
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2022: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2022: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20293/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 867262: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 714919b8 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20299
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2016: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2016: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20299/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 907276: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 6af34e90 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20330
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2020: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2020: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2020: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2020: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20330/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 173920: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 344a3aa0 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.20333
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2023: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.20333/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(168) @ 136663: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 53800000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_epmp_mml_test.19762
-------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2015: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2015: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mml_test.19762/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002015: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002015: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.19762
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2015: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2015: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.19762/trace_core_00000000.log
[E] 108: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002015: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
109:
110: --- RISC-V UVM TEST FAILED ---
111:
112: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002015: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.19770
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2017: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2017: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2017: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2017: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.19770/trace_core_00000000.log
[E] 108: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002017: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
109:
110: --- RISC-V UVM TEST FAILED ---
111:
112: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002017: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.19775
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2014: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2014: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.19775/trace_core_00000000.log
[E] 108: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002014: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
109:
110: --- RISC-V UVM TEST FAILED ---
111:
112: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002014: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_rlb_test.19762
-------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2015: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2015: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_rlb_test.19762/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002015: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002015: reporter [UVM/REPORT/CATCHER]
--------------------------------------------