Ibex Regression Results
Date/Time run: Wednesday 10 May 2023 04:00 UTC
| Test Name | Passing | Total | Pass Rate |
|---|
| riscv_arithmetic_basic_test |
10 |
10 |
100.0% |
| riscv_machine_mode_rand_test |
10 |
10 |
100.0% |
| riscv_rand_instr_test |
9 |
10 |
90.0% |
| riscv_rand_jump_test |
9 |
10 |
90.0% |
| riscv_jump_stress_test |
10 |
10 |
100.0% |
| riscv_loop_test |
10 |
10 |
100.0% |
| riscv_mmu_stress_test |
10 |
10 |
100.0% |
| riscv_illegal_instr_test |
15 |
15 |
100.0% |
| riscv_hint_instr_test |
10 |
10 |
100.0% |
| riscv_ebreak_test |
10 |
10 |
100.0% |
| riscv_debug_basic_test |
10 |
10 |
100.0% |
| riscv_debug_triggers_test |
5 |
5 |
100.0% |
| riscv_debug_stress_test |
15 |
15 |
100.0% |
| riscv_debug_branch_jump_test |
10 |
10 |
100.0% |
| riscv_debug_instr_test |
21 |
25 |
84.0% |
| riscv_debug_wfi_test |
9 |
10 |
90.0% |
| riscv_dret_test |
4 |
5 |
80.0% |
| riscv_debug_ebreak_test |
15 |
15 |
100.0% |
| riscv_debug_ebreakmu_test |
12 |
15 |
80.0% |
| riscv_debug_csr_entry_test |
10 |
10 |
100.0% |
| riscv_irq_in_debug_mode_test |
9 |
10 |
90.0% |
| riscv_debug_in_irq_test |
9 |
10 |
90.0% |
| riscv_assorted_traps_interrupts_debug_test |
4 |
10 |
40.0% |
| riscv_single_interrupt_test |
13 |
15 |
86.7% |
| riscv_multiple_interrupt_test |
9 |
10 |
90.0% |
| riscv_nested_interrupt_test |
10 |
10 |
100.0% |
| riscv_interrupt_instr_test |
25 |
25 |
100.0% |
| riscv_interrupt_wfi_test |
15 |
15 |
100.0% |
| riscv_interrupt_csr_test |
10 |
10 |
100.0% |
| riscv_csr_test |
5 |
5 |
100.0% |
| riscv_unaligned_load_store_test |
5 |
5 |
100.0% |
| riscv_mem_error_test |
13 |
15 |
86.7% |
| riscv_mem_intg_error_test |
12 |
15 |
80.0% |
| riscv_debug_single_step_test |
13 |
15 |
86.7% |
| riscv_reset_test |
10 |
15 |
66.7% |
| riscv_pc_intg_test |
14 |
15 |
93.3% |
| riscv_rf_intg_test |
15 |
15 |
100.0% |
| riscv_icache_intg_test |
15 |
15 |
100.0% |
| riscv_rv32im_instr_test |
5 |
5 |
100.0% |
| riscv_user_mode_rand_test |
10 |
10 |
100.0% |
| riscv_umode_tw_test |
10 |
10 |
100.0% |
| riscv_invalid_csr_test |
10 |
10 |
100.0% |
| riscv_pmp_basic_test |
46 |
50 |
92.0% |
| riscv_pmp_disable_all_regions_test |
50 |
50 |
100.0% |
| riscv_pmp_out_of_bounds_test |
41 |
50 |
82.0% |
| riscv_pmp_full_random_test |
566 |
600 |
94.3% |
| riscv_pmp_region_exec_test |
20 |
20 |
100.0% |
| riscv_epmp_mml_test |
17 |
20 |
85.0% |
| riscv_epmp_mml_execute_only_test |
20 |
20 |
100.0% |
| riscv_epmp_mml_read_only_test |
20 |
20 |
100.0% |
| riscv_epmp_mmwp_test |
15 |
20 |
75.0% |
| riscv_epmp_rlb_test |
18 |
20 |
90.0% |
| riscv_bitmanip_otearlgrey_test |
10 |
10 |
100.0% |
| riscv_bitmanip_balanced_test |
10 |
10 |
100.0% |
| Total |
1288 |
1380 |
93.3% |
Coverage
| Functional | Block | Branch | Statement | Expression | Toggle | FSM | Assertion |
|---|
| 93.6% |
94.6% |
90.5% |
94.6% |
91.4% |
96.6% |
100.0% |
98.1% |
Test Failure Details
riscv_rand_instr_test.16943
---------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
1079: 28906763: Illegal instruction (hart 0) at PC 0x8000798a: 0x7b3076f3
1080: 28944723: Illegal instruction (hart 0) at PC 0x80007a4c: 0xf12b5c73
1081: 28944763: Illegal instruction (hart 0) at PC 0x80007a4c: 0xf12b5c73
1082: 28969063: Illegal instruction (hart 0) at PC 0x80007a68: 0xf12c92f3
1083: 28969103: Illegal instruction (hart 0) at PC 0x80007a68: 0xf12c92f3
[E] 1084: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
1085:
1086: --- RISC-V UVM TEST FAILED ---
1087:
1088: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_rand_jump_test.16948
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2011: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2011: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_rand_jump_test.16948/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002011: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002011: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_instr_test.16941
----------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
873: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 28781226: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
874: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 28855226: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
875: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 28856706: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
876: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 28911726: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
877: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 28913226: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 878: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
879:
880: --- RISC-V UVM TEST FAILED ---
881:
882: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_instr_test.16960
----------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
1091: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26873420: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
1092: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26909760: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
1093: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26911260: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
1094: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26947480: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
1095: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26948980: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 1096: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 27002020: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
1097:
1098: --- RISC-V UVM TEST FAILED ---
1099:
1100: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 27002020: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_instr_test.16961
----------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_debug_instr_test.16964
----------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
827: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26823381: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
828: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26895281: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
829: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26896761: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
830: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26969281: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
831: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26970781: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 832: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 27002021: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
833:
834: --- RISC-V UVM TEST FAILED ---
835:
836: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 27002021: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_wfi_test.16943
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_wfi_test.16943/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(307) @ 2000002013: uvm_test_top [uvm_test_top] TEST TIMEOUT!!
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 2000002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_dret_test.16942
---------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
118: 42987: Illegal instruction (hart 0) at PC 0x80003570: 0x7b200073
119: 42987: Illegal instruction (hart 0) at PC 0x80003570: 0x7b200073
120: 43007: Illegal instruction (hart 0) at PC 0x80003570: 0x7b200073
121: 43027: Illegal instruction (hart 0) at PC 0x80003570: 0x7b200073
122: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(778) @ 62777: uvm_test_top [uvm_test_top] mcause: 0x2
[E] 123: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(843) @ 69457: reporter [uvm_test_top] Check failed dut_vif.dut_cb.priv_mode == mode (0 [0x0] vs 3 [0x3]) Incorrect privilege mode
124:
125: --- RISC-V UVM TEST FAILED ---
126:
127: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 69457: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_ebreakmu_test.16943
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_ebreakmu_test.16943/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1551) @ 30893: uvm_test_top [uvm_test_top] EBreak seen whilst doing initial debug initialization, KNOWN FAILURE SEE https://github.com/lowRISC/ibex/issues/1313
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 30893: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_ebreakmu_test.16951
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2022: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 1800s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2022: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_ebreakmu_test.16951/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1551) @ 48242: uvm_test_top [uvm_test_top] EBreak seen whilst doing initial debug initialization, KNOWN FAILURE SEE https://github.com/lowRISC/ibex/issues/1313
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 48242: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_ebreakmu_test.16954
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_debug_ebreakmu_test.16954/trace_core_00000000.log
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 28106: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
111: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 29606: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 28002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
113:
114: --- RISC-V UVM TEST FAILED ---
115:
116: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 28002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_irq_in_debug_mode_test.16941
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
3955: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26993396: uvm_test_top.env.irq_agent.sequencer@@irq_raise_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_raise_seq_h] Exiting sequence
3956: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 26993426: uvm_test_top [uvm_test_top] irq: 0x46880008
3957: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 26993426: uvm_test_top [uvm_test_top] irq_id: 0x13
3958: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26995386: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Starting sequence...
3959: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26995396: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
[E] 3960: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 27002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
3961:
3962: --- RISC-V UVM TEST FAILED ---
3963:
3964: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 27002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_debug_in_irq_test.16941
-----------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
2779: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 24974286: uvm_test_top [uvm_test_top] irq: 0xdeef0888
2780: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 24974286: uvm_test_top [uvm_test_top] irq_id: 0x1f
2781: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(778) @ 24982086: uvm_test_top [uvm_test_top] mcause: 0x8000001f
2782: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 24983026: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
2783: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 24984506: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
[E] 2784: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 25002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
2785:
2786: --- RISC-V UVM TEST FAILED ---
2787:
2788: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 25002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.16941
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
152: 531096: Illegal instruction (hart 0) at PC 0x00000018: 0x00010413
153: 543956: Illegal instruction (hart 0) at PC 0x0000001c: 0x00010413
154: 543996: Illegal instruction (hart 0) at PC 0x0000001c: 0x00010413
155: 565476: Illegal instruction (hart 0) at PC 0x00000020: 0x00010413
156: 565516: Illegal instruction (hart 0) at PC 0x00000020: 0x00010413
[E] 157: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 591706: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x16 DUT: 0 expected: 40000
158:
159:
160: --- RISC-V UVM TEST FAILED ---
161:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.16942
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_assorted_traps_interrupts_debug_test.16943
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
161: 1062243: Illegal instruction (hart 0) at PC 0x800204c6: 0x00010413
162: 1132323: Illegal instruction (hart 0) at PC 0x800050fe: 0x407ae13b
163: 1132363: Illegal instruction (hart 0) at PC 0x800050fe: 0x407ae13b
164: 1164803: Illegal instruction (hart 0) at PC 0x80005158: 0x03890ebb
165: 1164843: Illegal instruction (hart 0) at PC 0x80005158: 0x03890ebb
[E] 166: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1204853: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x16 DUT: 400000c3 expected: 400000c0
167:
168:
169: --- RISC-V UVM TEST FAILED ---
170:
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.16944
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
970: 13679740: Illegal instruction (hart 0) at PC 0x00000634: 0x00010413
971: 13679780: Illegal instruction (hart 0) at PC 0x00000634: 0x00010413
972: 13709580: Illegal instruction (hart 0) at PC 0x00000638: 0x00010413
973: 13709620: Illegal instruction (hart 0) at PC 0x00000638: 0x00010413
974: xmsim: *E,ASRTST (/home/azure/_work/1/s/ibex/rtl/ibex_controller.sv,995): (time 13767470 NS) Assertion core_ibex_tb_top.dut.u_ibex_top.u_ibex_core.id_stage_i.controller_i.IbexSetExceptionPCOnSpecialReqIfExpected has failed
[E] 975: UVM_ERROR /home/azure/_work/1/s/ibex/rtl/ibex_controller.sv(995) @ 13767470: reporter [ASSERT FAILED] IbexSetExceptionPCOnSpecialReqIfExpected
976:
977: --- RISC-V UVM TEST FAILED ---
978:
979: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 13767470: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.16946
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
1617: 24860634: Illegal instruction (hart 0) at PC 0xc971003e: 0x00010413
1618: 24884574: Illegal instruction (hart 0) at PC 0xc9710042: 0x00010413
1619: 24884614: Illegal instruction (hart 0) at PC 0xc9710042: 0x00010413
1620: 24986474: Illegal instruction (hart 0) at PC 0xc9710046: 0x00010413
1621: 24986514: Illegal instruction (hart 0) at PC 0xc9710046: 0x00010413
[E] 1622: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 25002024: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
1623:
1624: --- RISC-V UVM TEST FAILED ---
1625:
1626: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 25002024: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_assorted_traps_interrupts_debug_test.16949
------------------------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
2012: 28893678: Illegal instruction (hart 0) at PC 0x00000e88: 0x00010413
2013: 28938938: Illegal instruction (hart 0) at PC 0x00000e8c: 0x00010413
2014: 28938978: Illegal instruction (hart 0) at PC 0x00000e8c: 0x00010413
2015: 28972318: Illegal instruction (hart 0) at PC 0x00000e90: 0x00010413
2016: 28972358: Illegal instruction (hart 0) at PC 0x00000e90: 0x00010413
[E] 2017: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 29002028: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
2018:
2019: --- RISC-V UVM TEST FAILED ---
2020:
2021: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 29002028: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_single_interrupt_test.16941
---------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
6401: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 25970306: uvm_test_top [uvm_test_top] irq: 0x80000000
6402: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 25970306: uvm_test_top [uvm_test_top] irq_id: 0x1f
6403: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(778) @ 25982846: uvm_test_top [uvm_test_top] mcause: 0x8000001f
6404: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 25985746: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Starting sequence...
6405: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 25985756: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
[E] 6406: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 26002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
6407:
6408: --- RISC-V UVM TEST FAILED ---
6409:
6410: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 26002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_single_interrupt_test.16943
---------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
9057: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 27974983: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
9058: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 27989873: uvm_test_top.env.irq_agent.sequencer@@irq_single_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_single_seq_h] Starting sequence...
9059: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 27989883: uvm_test_top.env.irq_agent.sequencer@@irq_single_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_single_seq_h] Exiting sequence
9060: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 27989913: uvm_test_top [uvm_test_top] irq: 0x400000
9061: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 27989913: uvm_test_top [uvm_test_top] irq_id: 0x16
[E] 9062: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 28002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
9063:
9064: --- RISC-V UVM TEST FAILED ---
9065:
9066: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 28002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_multiple_interrupt_test.16941
-----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
6326: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26990656: uvm_test_top.env.irq_agent.sequencer@@irq_drop_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_drop_seq_h] Exiting sequence
6327: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 26998446: uvm_test_top.env.irq_agent.sequencer@@irq_raise_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_raise_seq_h] Starting sequence...
6328: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 26998466: uvm_test_top.env.irq_agent.sequencer@@irq_raise_seq_h [uvm_test_top.env.irq_agent.sequencer.irq_raise_seq_h] Exiting sequence
6329: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(627) @ 26998486: uvm_test_top [uvm_test_top] irq: 0x66670008
6330: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(630) @ 26998486: uvm_test_top [uvm_test_top] irq_id: 0x10
[E] 6331: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 27002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
6332:
6333: --- RISC-V UVM TEST FAILED ---
6334:
6335: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 27002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_mem_error_test.16950
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 16465: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
117: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 45625: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 118045: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
119: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 206485: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
120: xmsim: *SE,EILLCT: (File: ./fcov/core_ibex_fcov_if.sv, Line: 716):(Time: 207625 NS + 4) Illegal cross tuple (<0, 1, InstrCategoryFetchError, IdStallTypeMem, 0, 0, 0>) occurred corresponding to illegal cross bin (mem_stall_illegal) of cross (core_ibex_tb_top.dut.u_ibex_top.u_ibex_core.u_fcov_bind.uarch_cg_inst@11437_629.exception_stall_instr_cross).
[E] 121: xmsim: *SE,EILLCT: (File: ./fcov/core_ibex_fcov_if.sv, Line: 716):(Time: 207665 NS + 4) Illegal cross tuple (<0, 1, InstrCategoryFetchError, IdStallTypeMem, 0, 0, 0>) occurred corresponding to illegal cross bin (mem_stall_illegal) of cross (core_ibex_tb_top.dut.u_ibex_top.gen_lockstep.u_ibex_lockstep.u_shadow_core.u_fcov_bind.uarch_cg_inst@11454_1.exception_stall_instr_cross).
122: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 248605: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
123: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 292165: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
124: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 368265: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
125: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 443785: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
--------------------------------------------
riscv_mem_error_test.16954
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
172: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3200246: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
173: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3237706: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
174: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3289066: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
175: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3366786: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
176: xmsim: *SE,EILLCT: (File: ./fcov/core_ibex_fcov_if.sv, Line: 716):(Time: 3383226 NS + 4) Illegal cross tuple (<0, 1, InstrCategoryFetchError, IdStallTypeMem, 0, 0, 0>) occurred corresponding to illegal cross bin (mem_stall_illegal) of cross (core_ibex_tb_top.dut.u_ibex_top.u_ibex_core.u_fcov_bind.uarch_cg_inst@11437_629.exception_stall_instr_cross).
[E] 177: xmsim: *SE,EILLCT: (File: ./fcov/core_ibex_fcov_if.sv, Line: 716):(Time: 3383266 NS + 4) Illegal cross tuple (<0, 1, InstrCategoryFetchError, IdStallTypeMem, 0, 0, 0>) occurred corresponding to illegal cross bin (mem_stall_illegal) of cross (core_ibex_tb_top.dut.u_ibex_top.gen_lockstep.u_ibex_lockstep.u_shadow_core.u_fcov_bind.uarch_cg_inst@11454_1.exception_stall_instr_cross).
178: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3461426: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
179: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3534966: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
180: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3581306: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
181: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 3658766: reporter [core_ibex_tb_top.unmblk1] Enabling assertions: core_ibex_tb_top.NoAlertsTriggered
--------------------------------------------
riscv_mem_intg_error_test.16946
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
112: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2024: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
113: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_mem_intg_error_test.16946/trace_core_00000000.log
114: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1643) @ 32704: uvm_test_top [uvm_test_top] Running core_ibex_mem_error_test
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 32704: uvm_test_top.env.vseqr@@memory_error_seq_h [uvm_test_top.env.vseqr.memory_error_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 32704: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 117: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 82064: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x13 DUT: 80015041 expected: 0
118:
119:
120: --- RISC-V UVM TEST FAILED ---
121:
--------------------------------------------
riscv_mem_intg_error_test.16948
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
114: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1643) @ 14311: uvm_test_top [uvm_test_top] Running core_ibex_mem_error_test
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 14311: uvm_test_top.env.vseqr@@memory_error_seq_h [uvm_test_top.env.vseqr.memory_error_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 63291: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
117: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 102231: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 150391: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 119: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 199991: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x4 DUT: 8001c94e expected: 0
120:
121:
122: --- RISC-V UVM TEST FAILED ---
123:
--------------------------------------------
riscv_mem_intg_error_test.16955
-------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
112: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
113: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_mem_intg_error_test.16955/trace_core_00000000.log
114: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_test_lib.sv(1643) @ 14243: uvm_test_top [uvm_test_top] Running core_ibex_mem_error_test
115: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 14243: uvm_test_top.env.vseqr@@memory_error_seq_h [uvm_test_top.env.vseqr.memory_error_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
116: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv(163) @ 48783: reporter [core_ibex_tb_top.unmblk1] Disabling assertions: core_ibex_tb_top.NoAlertsTriggered
[E] 117: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 103803: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Register write data mismatch to x15 DUT: 80018911 expected: 0
118:
119:
120: --- RISC-V UVM TEST FAILED ---
121:
--------------------------------------------
riscv_debug_single_step_test.16943
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
117: 615423: Illegal instruction (hart 0) at PC 0x8000358e: 0xf13bd973
118: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 691873: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
119: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 693393: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
120: 1089163: Illegal instruction (hart 0) at PC 0x40000106: 0x00010413
121: 1089203: Illegal instruction (hart 0) at PC 0x40000106: 0x00010413
[E] 122: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1089233: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT didn't write to register x15, but a write was expected
123:
124:
125: --- RISC-V UVM TEST FAILED ---
126:
--------------------------------------------
riscv_debug_single_step_test.16945
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
229: 23488177: Illegal instruction (hart 0) at PC 0x00000010: 0x00010413
230: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(43) @ 23512527: reporter@@debug_seq_single_h [debug_seq_single_h] Starting sequence...
231: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_seq_lib.sv(55) @ 23514027: reporter@@debug_seq_single_h [debug_seq_single_h] Exiting sequence
232: 24824837: Illegal instruction (hart 0) at PC 0x00000014: 0x00010413
233: 24824877: Illegal instruction (hart 0) at PC 0x00000014: 0x00010413
[E] 234: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 25002027: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
235:
236: --- RISC-V UVM TEST FAILED ---
237:
238: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 25002027: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_reset_test.16943
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_reset_test.16944
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
191: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 22922190: uvm_test_top [uvm_test_top] Reset now inactive
192: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 23255421: uvm_test_top [uvm_test_top] Reset now active
193: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 23257410: uvm_test_top [uvm_test_top] Reset now inactive
194: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 23940418: uvm_test_top [uvm_test_top] Reset now active
195: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 23942410: uvm_test_top [uvm_test_top] Reset now inactive
[E] 196: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 24002010: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
197:
198: --- RISC-V UVM TEST FAILED ---
199:
200: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 24002010: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_reset_test.16947
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation process killed due to timeout [1860s].
riscv_reset_test.16948
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
191: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 20338211: uvm_test_top [uvm_test_top] Reset now inactive
192: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 20413450: uvm_test_top [uvm_test_top] Reset now active
193: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 20415431: uvm_test_top [uvm_test_top] Reset now inactive
194: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 21107843: uvm_test_top [uvm_test_top] Reset now active
195: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 21109831: uvm_test_top [uvm_test_top] Reset now inactive
[E] 196: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 24002011: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
197:
198: --- RISC-V UVM TEST FAILED ---
199:
200: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 24002011: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_reset_test.16952
----------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [1800s].
---------------*LOG-EXTRACT*----------------
199: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 23262012: uvm_test_top [uvm_test_top] Reset now inactive
200: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 24080711: uvm_test_top [uvm_test_top] Reset now active
201: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 24082692: uvm_test_top [uvm_test_top] Reset now inactive
202: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(253) @ 24791254: uvm_test_top [uvm_test_top] Reset now active
203: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(260) @ 24793252: uvm_test_top [uvm_test_top] Reset now inactive
[E] 204: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 25002012: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [1800s]
205:
206: --- RISC-V UVM TEST FAILED ---
207:
208: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 25002012: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pc_intg_test.16953
------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: Processing the ibex trace failed: Logfile /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pc_intg_test.16953/trace_core_00000000.log not found
riscv_pmp_basic_test.16943
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_basic_test.16943/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_basic_test.16947
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2014: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2014: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_basic_test.16947/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002014: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002014: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_basic_test.16968
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2022: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2022: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_basic_test.16968/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002022: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002022: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_basic_test.16986
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2026: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_basic_test.16986/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16943
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16943/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16949
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2028: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2028: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16949/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002028: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002028: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16951
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2022: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2022: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16951/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002022: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002022: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16958
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2027: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2027: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16958/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002027: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002027: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16959
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2023: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16959/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002023: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002023: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16963
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2024: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2024: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2024: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16963/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002024: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002024: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16968
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2022: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2022: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2022: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16968/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002022: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002022: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16976
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2010: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2010: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16976/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002010: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002010: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_out_of_bounds_test.16986
----------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2026: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
109: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_out_of_bounds_test.16986/trace_core_00000000.log
[E] 110: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
111:
112: --- RISC-V UVM TEST FAILED ---
113:
114: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_pmp_full_random_test.16943
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.16943/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 817373: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 4af10800 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.16958
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2027: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2027: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.16958/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 287007: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 10400000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.16984
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2012: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2012: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.16984/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 53672: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 19c40000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17028
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2014: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2014: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17028/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 403614: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 4c06000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17042
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17042/trace_core_00000000.log
112: 51321: Illegal instruction (hart 0) at PC 0x80005f7c: 0x3a0a6073
113: 51361: Illegal instruction (hart 0) at PC 0x80005f7c: 0x3a0a6073
114: 73601: Illegal instruction (hart 0) at PC 0x80005f8e: 0x3b0b1073
115: 73641: Illegal instruction (hart 0) at PC 0x80005f8e: 0x3b0b1073
[E] 116: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 87291: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80005f98
117:
118:
119: --- RISC-V UVM TEST FAILED ---
120:
--------------------------------------------
riscv_pmp_full_random_test.17052
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2026: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17052/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 26946: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address d3a0000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17053
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2023: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17053/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 68723: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80003650
113:
114:
115: --- RISC-V UVM TEST FAILED ---
116:
--------------------------------------------
riscv_pmp_full_random_test.17064
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2015: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2015: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17064/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 27655: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 139faec0 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17065
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2012: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2012: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17065/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1007832: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 74600000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17075
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2028: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2028: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17075/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 357368: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 40000000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002200 but the DUT didn't report one at PC 80002282
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17101
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2026: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17101/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1520566: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 5c40800 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17124
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2028: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2028: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2028: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17124/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 172728: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 70437f00 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17146
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17146/trace_core_00000000.log
112: 24675: Illegal instruction (hart 0) at PC 0x80014b60: 0x3a086073
113: 24715: Illegal instruction (hart 0) at PC 0x80014b60: 0x3a086073
114: 51075: Illegal instruction (hart 0) at PC 0x80014b72: 0x3b0d9073
115: 51115: Illegal instruction (hart 0) at PC 0x80014b72: 0x3b0d9073
[E] 116: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 954185: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 3a000000 but store at address 80036ce0 was expected
117: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
118:
119:
120: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17167
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17167/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1834053: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 14f3f00 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17196
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2023: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17196/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 2007763: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 80000000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17200
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2010: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2010: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2010: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17200/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1267530: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 8bc93900 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17240
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17240/trace_core_00000000.log
112: 38722: Illegal instruction (hart 0) at PC 0x800034bc: 0x3a0a6073
113: 38762: Illegal instruction (hart 0) at PC 0x800034bc: 0x3a0a6073
114: 72302: Illegal instruction (hart 0) at PC 0x800034ce: 0x3b021073
115: 72342: Illegal instruction (hart 0) at PC 0x800034ce: 0x3b021073
[E] 116: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1781692: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 399d8240 but store at address 80035ce0 was expected
117: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
118:
119:
120: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17247
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2016: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2016: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17247/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 42076: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 62d38000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17291
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2019: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2019: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2019: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17291/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 177259: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 0 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17299
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2027: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2027: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17299/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 832647: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 1b061000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80002682
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17304
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2025: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2025: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2025: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2025: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17304/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 123965: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 39dec000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17314
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17314/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 637341: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 7e200000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002200 but the DUT didn't report one at PC 80002282
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17335
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2048: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2048: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2048: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2048: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17335/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 55368: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 0 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17363
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17363/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 29601: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 40cc4000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17377
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
131: 154287: Illegal instruction (hart 0) at PC 0x80004874: 0x3a0be073
132: 154307: Illegal instruction (hart 0) at PC 0x80004874: 0x3a0be073
133: 154327: Illegal instruction (hart 0) at PC 0x80004874: 0x3a0be073
134: 169307: Illegal instruction (hart 0) at PC 0x80004886: 0x3b0b1073
135: 169347: Illegal instruction (hart 0) at PC 0x80004886: 0x3b0b1073
[E] 136: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1801777: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Synchronous trap was expected at ISS PC: 80001f00 but the DUT didn't report one at PC 80004a74
137:
138:
139: --- RISC-V UVM TEST FAILED ---
140:
--------------------------------------------
riscv_pmp_full_random_test.17381
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2018: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2018: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2018: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2018: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17381/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 776598: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 1cbf22c0 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17400
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2011: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2011: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17400/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 281411: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 24a5840 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17418
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2015: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2015: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2015: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17418/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 279535: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 80000000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17437
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
127: 1972259: Illegal instruction (hart 0) at PC 0x80006ce8: 0x3a0ae073
128: 1972279: Illegal instruction (hart 0) at PC 0x80006ce8: 0x3a0ae073
129: 1972279: Illegal instruction (hart 0) at PC 0x80006ce8: 0x3a0ae073
130: 1972299: Illegal instruction (hart 0) at PC 0x80006ce8: 0x3a0ae073
131: 1972319: Illegal instruction (hart 0) at PC 0x80006ce8: 0x3a0ae073
[E] 132: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1972809: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 5b792000 but store at address 80036ce0 was expected
133: Synchronous trap was expected at ISS PC: 80002700 but the DUT didn't report one at PC 80002782
134:
135:
136: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17461
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2021: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2021: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2021: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17461/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1507881: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 611bd000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17471
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2016: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2016: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2016: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17471/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1606136: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated load at address 40000000 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002400 but the DUT didn't report one at PC 80002482
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17474
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2027: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2027: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2027: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17474/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 1043087: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 5600000 but store at address 80036ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_pmp_full_random_test.17504
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17504/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 50113: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch Synchronous trap was expected at ISS PC: 80002600 but the DUT didn't report one at PC 80003442
113:
114:
115: --- RISC-V UVM TEST FAILED ---
116:
--------------------------------------------
riscv_pmp_full_random_test.17509
--------------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILED]: error seen in 'rtl_sim.log'
---------------*LOG-EXTRACT*----------------
107: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2011: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 180s
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
109: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2011: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
110: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2011: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
111: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_pmp_full_random_test.17509/trace_core_00000000.log
[E] 112: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_cosim_scoreboard.sv(167) @ 25591: uvm_test_top.env.cosim_agent.scoreboard [uvm_test_top.env.cosim_agent.scoreboard] Cosim mismatch DUT generated store at address 7fd93600 but store at address 80035ce0 was expected
113: Synchronous trap was expected at ISS PC: 80002500 but the DUT didn't report one at PC 80002582
114:
115:
116: --- RISC-V UVM TEST FAILED ---
--------------------------------------------
riscv_epmp_mml_test.16943
-------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mml_test.16943/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mml_test.16947
-------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2014: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2014: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mml_test.16947/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002014: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002014: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mml_test.16959
-------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2023: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2023: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2023: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mml_test.16959/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 4002023: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 4002023: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.16941
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.16941/trace_core_00000000.log
108: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(283) @ 4960286: uvm_test_top [uvm_test_top] Test done due to RISCV-DV handshake (payload=TEST_PASS)
[E] 109: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
110:
111: --- RISC-V UVM TEST FAILED ---
112:
113: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.16943
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.16943/trace_core_00000000.log
[E] 108: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
109:
110: --- RISC-V UVM TEST FAILED ---
111:
112: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.16947
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2014: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2014: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.16947/trace_core_00000000.log
[E] 108: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002014: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
109:
110: --- RISC-V UVM TEST FAILED ---
111:
112: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002014: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.16952
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2012: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2012: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2012: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.16952/trace_core_00000000.log
[E] 108: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002012: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
109:
110: --- RISC-V UVM TEST FAILED ---
111:
112: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002012: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_mmwp_test.16954
--------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2026: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
105: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2026: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
106: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2026: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
107: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_mmwp_test.16954/trace_core_00000000.log
[E] 108: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002026: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
109:
110: --- RISC-V UVM TEST FAILED ---
111:
112: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002026: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_rlb_test.16943
-------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2013: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2013: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2013: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_rlb_test.16943/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002013: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002013: reporter [UVM/REPORT/CATCHER]
--------------------------------------------
riscv_epmp_rlb_test.16947
-------------------------
binary: test.bin
rtl_log: rtl_sim.log
rtl_trace: trace_core_00000000.log
iss_cosim_trace: spike_cosim_trace_core_00000000.log
[FAILURE] Simulation ended gracefully due to timeout [300s].
---------------*LOG-EXTRACT*----------------
101: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(315) @ 2014: uvm_test_top [uvm_test_top] Test wall-clock timeout is set to : 300s
102: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.instr_if_response_agent.sequencer@@instr_intf_seq [uvm_test_top.env.instr_if_response_agent.sequencer.instr_intf_seq] is_dmem_seq: 0x0
103: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/common/ibex_mem_intf_agent/ibex_mem_intf_response_seq_lib.sv(35) @ 2014: uvm_test_top.env.data_if_response_agent.sequencer@@data_intf_seq [uvm_test_top.env.data_if_response_agent.sequencer.data_intf_seq] is_dmem_seq: 0x1
104: UVM_INFO /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_new_seq_lib.sv(65) @ 2014: reporter@@fetch_enable_seq_h [fetch_enable_seq_h] Running the "InfiniteRuns" schedule for stimulus generation
105: core_ibex_tb_top.dut.u_ibex_tracer.printbuffer_dumpline.unmblk1: Writing execution trace to /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/out/run/tests/riscv_epmp_rlb_test.16947/trace_core_00000000.log
[E] 106: UVM_FATAL /home/azure/_work/1/s/ibex/dv/uvm/core_ibex/tests/core_ibex_base_test.sv(326) @ 5002014: uvm_test_top [uvm_test_top] Test failed due to wall-clock timeout. [300s]
107:
108: --- RISC-V UVM TEST FAILED ---
109:
110: UVM_INFO /nas/lowrisc/tools/cadence/xcelium/21.09-s006/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 5002014: reporter [UVM/REPORT/CATCHER]
--------------------------------------------